The CPU is a 16-bit, word-oriented, twos-complement, single-address computer. It is designed with the goals of instruction-set orthogonality, flexible addressing, and simple instructions in mind. It is RISC-influenced, but I do not consider it to be strictly limited by RISC principles. It is also influenced by the MOS 6502, in its variety of addressing modes.

The CPU is word-oriented; that is, it does not address memory on a byte level. However, certain registers are eight bits wide instead of sixteen, and certain 16-bit registers can be accessed as two separate 8-bit registers. When operations are performed on these registers, the Negative flag is set based on bit 7, instead of bit F. When 8-bit component registers of a 16-bit register are accessed, only the selected 8 bits will be affected by an operation. When a 16-bit value is transferred into an 8-bit register, the destination register is loaded from the low 8 bits of the source register. When an 8-bit value is transferred into a 16-bit register, the source register is loaded into the low 8 bits of the destination register, and sign-extended into the high 8 bits.