OPCODE LIST

Each instruction in the CPU is either one or two words in length. The first word is the instruction word, which is divided into three parts: the instruction, the address mode, and the post-byte. The second word (where applicable) is the post-word. Both the post-byte and post-word contain arguments for the instruction; these vary by instruction and addressing mode.

FEDCBA9876543210  
+---++-++------+
  I   M     B
I: Instruction
M: Addressing mode
B: Post-byte

As you can see, there are five bits for the instruction, and three for the addressing mode. Therefore, we have 32 instructions reserved with eight opcodes apiece, each with a different addressing mode. Not all of the CPU instructions detailed on the Instructions page actually have eight opcodes; therefore, they are grouped into several Extended instructions at the end of the opcode list. This leaves several of the 32 instruction spaces empty; these are marked as Reserved, and executing any of these unassigned opcodes will generate an Opcode exception (as detailed on the Interrupts page.)

Following is an (at present) complete list of all the instructions in the CPU. This is subject to change, but will eventually be updated to be comprehensive.

#  Instruction#  Addressing modeArgumentsCycles
00Load
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3Register indirectB0-B3 = dest. reg., B4-B7 = pointer reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
01Store
0RegisterB4-B7 = src. reg., B0-B3 = dest. reg.0
1MemoryB4-B7 = src. reg., W0-WF = address0
2IndirectB4-B7 = src. reg., W0-WF = pointer address0
3Register indirectB4-B7 = src. reg., B0-B3 = pointer reg.0
4IndexedB4-B7 = src. reg., B0-B3 = index reg., W0-WF = address0
5Indexed++B4-B7 = src. reg., B0-B3 = index reg., W0-WF = address0
6Indexed--B4-B7 = src. reg., B0-B3 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = src. reg., B0-B3 = index reg., W0-WF = ptr. addr.0
02Add
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3RegisterB0-B3 = dest. reg., B4-B7 = src. reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
03Add with carry
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3RegisterB0-B3 = dest. reg., B4-B7 = src. reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
04Subtract
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3RegisterB0-B3 = dest. reg., B4-B7 = src. reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
05Subtract with borrow
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3RegisterB0-B3 = dest. reg., B4-B7 = src. reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
06Shift left
0RegisterB0-B3 = dest. reg., B4-B7 = places0
1MemoryB4-B7 = places, W0-WF = address0
2IndirectB4-B7 = places, W0-WF = pointer address0
3Register indirectB4-B7 = places, B0-B3 = pointer reg.0
4IndexedB4-B7 = places, B0-B3 = index reg., W0-WF = address0
5Indexed++B4-B7 = places, B0-B3 = index reg., W0-WF = address0
6Indexed--B4-B7 = places, B0-B3 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.0
07Shift right
0RegisterB0-B3 = dest. reg., B4-B7 = places0
1MemoryB4-B7 = places, W0-WF = address0
2IndirectB4-B7 = places, W0-WF = pointer address0
3Register indirectB4-B7 = places, B0-B3 = pointer reg.0
4IndexedB4-B7 = places, B0-B3 = index reg., W0-WF = address0
5Indexed++B4-B7 = places, B0-B3 = index reg., W0-WF = address0
6Indexed--B4-B7 = places, B0-B3 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.0
08Shift left with carry
0RegisterB0-B3 = dest. reg., B4-B7 = places0
1MemoryB4-B7 = places, W0-WF = address0
2IndirectB4-B7 = places, W0-WF = pointer address0
3Register indirectB4-B7 = places, B0-B3 = pointer reg.0
4IndexedB4-B7 = places, B0-B3 = index reg., W0-WF = address0
5Indexed++B4-B7 = places, B0-B3 = index reg., W0-WF = address0
6Indexed--B4-B7 = places, B0-B3 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.0
09Shift right with carry
0RegisterB0-B3 = dest. reg., B4-B7 = places0
1MemoryB4-B7 = places, W0-WF = address0
2IndirectB4-B7 = places, W0-WF = pointer address0
3Register indirectB4-B7 = places, B0-B3 = pointer reg.0
4IndexedB4-B7 = places, B0-B3 = index reg., W0-WF = address0
5Indexed++B4-B7 = places, B0-B3 = index reg., W0-WF = address0
6Indexed--B4-B7 = places, B0-B3 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.0
0AShift right with sign-extend
0RegisterB0-B3 = dest. reg., B4-B7 = places0
1MemoryB4-B7 = places, W0-WF = address0
2IndirectB4-B7 = places, W0-WF = pointer address0
3Register indirectB4-B7 = places, B0-B3 = pointer reg.0
4IndexedB4-B7 = places, B0-B3 = index reg., W0-WF = address0
5Indexed++B4-B7 = places, B0-B3 = index reg., W0-WF = address0
6Indexed--B4-B7 = places, B0-B3 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.0
0BAND
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3RegisterB0-B3 = dest. reg., B4-B7 = src. reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
0COR
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3RegisterB0-B3 = dest. reg., B4-B7 = src. reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
0DXOR
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3RegisterB0-B3 = dest. reg., B4-B7 = src. reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
0ERotate left
0RegisterB0-B3 = dest. reg., B4-B7 = places0
1MemoryB4-B7 = places, W0-WF = address0
2IndirectB4-B7 = places, W0-WF = pointer address0
3Register indirectB4-B7 = places, B0-B3 = pointer reg.0
4IndexedB4-B7 = places, B0-B3 = index reg., W0-WF = address0
5Indexed++B4-B7 = places, B0-B3 = index reg., W0-WF = address0
6Indexed--B4-B7 = places, B0-B3 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.0
0FRotate right
0RegisterB0-B3 = dest. reg., B4-B7 = places0
1MemoryB4-B7 = places, W0-WF = address0
2IndirectB4-B7 = places, W0-WF = pointer address0
3Register indirectB4-B7 = places, B0-B3 = pointer reg.0
4IndexedB4-B7 = places, B0-B3 = index reg., W0-WF = address0
5Indexed++B4-B7 = places, B0-B3 = index reg., W0-WF = address0
6Indexed--B4-B7 = places, B0-B3 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.0
10Compare
0ImmediateB0-B3 = dest. reg., W0-WF = value0
1MemoryB0-B3 = dest. reg., W0-WF = address0
2IndirectB0-B3 = dest. reg., W0-WF = pointer address0
3RegisterB0-B3 = dest. reg., B4-B7 = src. reg.0
4IndexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
5Indexed++B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
6Indexed--B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.0
11Test
0RegisterB4-B7 = src. reg.0
1MemoryW0-WF = address0
2IndirectW0-WF = pointer address0
3Register indirectB4-B7 = pointer reg.0
4IndexedB0-B3 = index reg., W0-WF = address0
5Indexed++B0-B3 = index reg., W0-WF = address0
6Indexed--B0-B3 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = index reg., W0-WF = ptr. addr.0
12In
0Dummy readB0-B7 = port0
1MemoryB0-B7 = port, W0-WF = address0
2IndirectB0-B7 = port, W0-WF = address0
3RegisterB0-B3 = dest. reg., W0-W7 = port0
4IndexedB0-B3 = index reg., B4-B7 = port, W0-WF = address0
5Indexed++B0-B3 = index reg., B4-B7 = port, W0-WF = address0
6Indexed--B0-B3 = index reg., B4-B7 = port, W0-WF = address0
7Indirect indexedB0-B3 = index reg., B4-B7 = port, W0-WF = ptr. addr.0
13Out
0ImmediateB0-B7 = port, W0-WF = value0
1MemoryB0-B7 = port, W0-WF = address0
2IndirectB0-B7 = port, W0-WF = address0
3RegisterB4-B7 = src. reg., W0-W7 = port0
4IndexedB0-B3 = index reg., B4-B7 = port, W0-WF = address0
5Indexed++B0-B3 = index reg., B4-B7 = port, W0-WF = address0
6Indexed--B0-B3 = index reg., B4-B7 = port, W0-WF = address0
7Indirect indexedB0-B3 = index reg., B4-B7 = port, W0-WF = ptr. addr.0
14Push
0ImmediateW0-WF = value0
1MemoryW0-WF = address0
2IndirectW0-WF = pointer address0
3RegisterB4-B7 = src. reg.0
4IndexedB0-B3 = index reg., W0-WF = address0
5Indexed++B0-B3 = index reg., W0-WF = address0
6Indexed--B0-B3 = index reg., W0-WF = address0
7Indirect indexedB0-B3 = index reg., W0-WF = ptr. addr.0
15Pull
0Dummy pull0
1MemoryW0-WF = address0
2IndirectW0-WF = pointer address0
3RegisterB0-B3 = dest. reg.0
4IndexedB4-B7 = index reg., W0-WF = address0
5Indexed++B4-B7 = index reg., W0-WF = address0
6Indexed--B4-B7 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = index reg., W0-WF = ptr. addr.0
16Jump/Call
0Jump absolute farB0-B7 = segment, W0-WF = address0
1Jump absoluteW0-WF = address0
2Jump relativeW0-WF = offset0
3Jump indirectW0-WF = pointer address0
4Call absolute farB0-B7 = segment, W0-WF = address0
5Call absoluteW0-WF = address0
6Call relativeW0-WF = offset0
7Call indirectW0-WF = pointer address0
17Branch
0Branch on set, nextB0-B7 = bits0
1Branch on set, absoluteB0-B7 = bits, W0-WF = address0
2Branch on set, relativeB0-B7 = bits, W0-WF = offset0
3Branch on set, indirectB0-B7 = bits, W0-WF = pointer address0
4Branch on clear, nextB0-B7 = bits0
5Branch on clear, abs.B0-B7 = bits, W0-WF = address0
6Branch on clear, rel.B0-B7 = bits, W0-WF = offset0
7Branch on clear, ind.B0-B7 = bits, W0-WF = pointer address0
18Twos-complement
0RegisterB0-B3 = dest. reg.0
1MemoryW0-WF = address0
2IndirectW0-WF = pointer address0
3Register indirectB0-B3 = pointer reg.0
4IndexedB4-B7 = index reg., W0-WF = address0
5Indexed++B4-B7 = index reg., W0-WF = address0
6Indexed--B4-B7 = index reg., W0-WF = address0
7Indirect indexedB4-B7 = index reg., W0-WF = ptr. addr.0
19Reserved
0 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
1AReserved
0 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
1BReserved
0 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
1CReserved
0 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
1DReserved
0 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
1EExtended
0Loop absoluteB4-B7 = index reg., W0-WF = address0
1Loop relativeB4-B7 = index reg., W0-WF = offset0
2Loop indirectB4-B7 = index reg., W0-WF = pointer address0
3Push special registerB0-B1 = special reg.0
4Pull special registerB4-B5 = special reg.0
5HaltB0-B5 = interrupt mask0
6No-op0
7Software interruptB0-B2 = interrupt0
1FExtended
0 0
1Return 0
2Return far 0
3Return from interrupt 0
4Transfer from special reg.B0-B3 = dest. reg., B4-B5 = special reg.0
5Transfer to special reg.B0-B1 = special reg., B4-B7 = src. reg.0
6Transfer from stack ptr.B0-B3 = dest. reg.0
7Transfer to stack ptr.B4-B7 = src. reg.0