Each instruction in the CPU is either one or two words in length. The first word is the instruction word, which is divided into three parts: the instruction, the address mode, and the post-byte. The second word (where applicable) is the post-word. Both the post-byte and post-word contain arguments for the instruction; these vary by instruction and addressing mode.

FEDCBA9876543210   +---++-++------+   I   M     B

I: Instruction M: Addressing mode B: Post-byte

As you can see, there are five bits for the instruction, and three for the addressing mode. Therefore, we have 32 instructions reserved with eight opcodes apiece, each with a different addressing mode. Not all of the CPU instructions detailed on the Instructions page actually have eight opcodes; therefore, they are grouped into several Extended instructions at the end of the opcode list. This leaves several of the 32 instruction spaces empty; these are marked as Reserved, and executing any of these unassigned opcodes will generate an Opcode exception (as detailed on the Interrupts page.)

Following is an (at present) complete list of all the instructions in the CPU. This is subject to change, but will eventually be updated to be comprehensive.

#	Instruction	#	Addressing mode	Arguments	Cycles
00	Load
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register indirect	B0-B3 = dest. reg., B4-B7 = pointer reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
01	Store
		0	Register	B4-B7 = src. reg., B0-B3 = dest. reg.	0
		1	Memory	B4-B7 = src. reg., W0-WF = address	0
		2	Indirect	B4-B7 = src. reg., W0-WF = pointer address	0
		3	Register indirect	B4-B7 = src. reg., B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = src. reg., B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = src. reg., B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = src. reg., B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = src. reg., B0-B3 = index reg., W0-WF = ptr. addr.	0
02	Add
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg., B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
03	Add with carry
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg., B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
04	Subtract
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg., B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
05	Subtract with borrow
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg., B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
06	Shift left
		0	Register	B0-B3 = dest. reg., B4-B7 = places	0
		1	Memory	B4-B7 = places, W0-WF = address	0
		2	Indirect	B4-B7 = places, W0-WF = pointer address	0
		3	Register indirect	B4-B7 = places, B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.	0
07	Shift right
		0	Register	B0-B3 = dest. reg., B4-B7 = places	0
		1	Memory	B4-B7 = places, W0-WF = address	0
		2	Indirect	B4-B7 = places, W0-WF = pointer address	0
		3	Register indirect	B4-B7 = places, B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.	0
08	Shift left with carry
		0	Register	B0-B3 = dest. reg., B4-B7 = places	0
		1	Memory	B4-B7 = places, W0-WF = address	0
		2	Indirect	B4-B7 = places, W0-WF = pointer address	0
		3	Register indirect	B4-B7 = places, B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.	0
09	Shift right with carry
		0	Register	B0-B3 = dest. reg., B4-B7 = places	0
		1	Memory	B4-B7 = places, W0-WF = address	0
		2	Indirect	B4-B7 = places, W0-WF = pointer address	0
		3	Register indirect	B4-B7 = places, B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.	0
0A	Shift right with sign-extend
		0	Register	B0-B3 = dest. reg., B4-B7 = places	0
		1	Memory	B4-B7 = places, W0-WF = address	0
		2	Indirect	B4-B7 = places, W0-WF = pointer address	0
		3	Register indirect	B4-B7 = places, B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.	0
0B	AND
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg., B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
0C	OR
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg., B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
0D	XOR
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg., B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
0E	Rotate left
		0	Register	B0-B3 = dest. reg., B4-B7 = places	0
		1	Memory	B4-B7 = places, W0-WF = address	0
		2	Indirect	B4-B7 = places, W0-WF = pointer address	0
		3	Register indirect	B4-B7 = places, B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.	0
0F	Rotate right
		0	Register	B0-B3 = dest. reg., B4-B7 = places	0
		1	Memory	B4-B7 = places, W0-WF = address	0
		2	Indirect	B4-B7 = places, W0-WF = pointer address	0
		3	Register indirect	B4-B7 = places, B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = places, B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = places, B0-B3 = index reg., W0-WF = ptr. addr.	0
10	Compare
		0	Immediate	B0-B3 = dest. reg., W0-WF = value	0
		1	Memory	B0-B3 = dest. reg., W0-WF = address	0
		2	Indirect	B0-B3 = dest. reg., W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg., B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = dest. reg., B4-B7 = index reg., W0-WF = ptr. addr.	0
11	Test
		0	Register	B4-B7 = src. reg.	0
		1	Memory	W0-WF = address	0
		2	Indirect	W0-WF = pointer address	0
		3	Register indirect	B4-B7 = pointer reg.	0
		4	Indexed	B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = index reg., W0-WF = ptr. addr.	0
12	In
		0	Dummy read	B0-B7 = port	0
		1	Memory	B0-B7 = port, W0-WF = address	0
		2	Indirect	B0-B7 = port, W0-WF = address	0
		3	Register	B0-B3 = dest. reg., W0-W7 = port	0
		4	Indexed	B0-B3 = index reg., B4-B7 = port, W0-WF = address	0
		5	Indexed++	B0-B3 = index reg., B4-B7 = port, W0-WF = address	0
		6	Indexed--	B0-B3 = index reg., B4-B7 = port, W0-WF = address	0
		7	Indirect indexed	B0-B3 = index reg., B4-B7 = port, W0-WF = ptr. addr.	0
13	Out
		0	Immediate	B0-B7 = port, W0-WF = value	0
		1	Memory	B0-B7 = port, W0-WF = address	0
		2	Indirect	B0-B7 = port, W0-WF = address	0
		3	Register	B4-B7 = src. reg., W0-W7 = port	0
		4	Indexed	B0-B3 = index reg., B4-B7 = port, W0-WF = address	0
		5	Indexed++	B0-B3 = index reg., B4-B7 = port, W0-WF = address	0
		6	Indexed--	B0-B3 = index reg., B4-B7 = port, W0-WF = address	0
		7	Indirect indexed	B0-B3 = index reg., B4-B7 = port, W0-WF = ptr. addr.	0
14	Push
		0	Immediate	W0-WF = value	0
		1	Memory	W0-WF = address	0
		2	Indirect	W0-WF = pointer address	0
		3	Register	B4-B7 = src. reg.	0
		4	Indexed	B0-B3 = index reg., W0-WF = address	0
		5	Indexed++	B0-B3 = index reg., W0-WF = address	0
		6	Indexed--	B0-B3 = index reg., W0-WF = address	0
		7	Indirect indexed	B0-B3 = index reg., W0-WF = ptr. addr.	0
15	Pull
		0	Dummy pull		0
		1	Memory	W0-WF = address	0
		2	Indirect	W0-WF = pointer address	0
		3	Register	B0-B3 = dest. reg.	0
		4	Indexed	B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = index reg., W0-WF = ptr. addr.	0
16	Jump/Call
		0	Jump absolute far	B0-B7 = segment, W0-WF = address	0
		1	Jump absolute	W0-WF = address	0
		2	Jump relative	W0-WF = offset	0
		3	Jump indirect	W0-WF = pointer address	0
		4	Call absolute far	B0-B7 = segment, W0-WF = address	0
		5	Call absolute	W0-WF = address	0
		6	Call relative	W0-WF = offset	0
		7	Call indirect	W0-WF = pointer address	0
17	Branch
		0	Branch on set, next	B0-B7 = bits	0
		1	Branch on set, absolute	B0-B7 = bits, W0-WF = address	0
		2	Branch on set, relative	B0-B7 = bits, W0-WF = offset	0
		3	Branch on set, indirect	B0-B7 = bits, W0-WF = pointer address	0
		4	Branch on clear, next	B0-B7 = bits	0
		5	Branch on clear, abs.	B0-B7 = bits, W0-WF = address	0
		6	Branch on clear, rel.	B0-B7 = bits, W0-WF = offset	0
		7	Branch on clear, ind.	B0-B7 = bits, W0-WF = pointer address	0
18	Twos-complement
		0	Register	B0-B3 = dest. reg.	0
		1	Memory	W0-WF = address	0
		2	Indirect	W0-WF = pointer address	0
		3	Register indirect	B0-B3 = pointer reg.	0
		4	Indexed	B4-B7 = index reg., W0-WF = address	0
		5	Indexed++	B4-B7 = index reg., W0-WF = address	0
		6	Indexed--	B4-B7 = index reg., W0-WF = address	0
		7	Indirect indexed	B4-B7 = index reg., W0-WF = ptr. addr.	0
19	Reserved
		0			0
		1			0
		2			0
		3			0
		4			0
		5			0
		6			0
		7			0
1A	Reserved
		0			0
		1			0
		2			0
		3			0
		4			0
		5			0
		6			0
		7			0
1B	Reserved
		0			0
		1			0
		2			0
		3			0
		4			0
		5			0
		6			0
		7			0
1C	Reserved
		0			0
		1			0
		2			0
		3			0
		4			0
		5			0
		6			0
		7			0
1D	Reserved
		0			0
		1			0
		2			0
		3			0
		4			0
		5			0
		6			0
		7			0
1E	Extended
		0	Loop absolute	B4-B7 = index reg., W0-WF = address	0
		1	Loop relative	B4-B7 = index reg., W0-WF = offset	0
		2	Loop indirect	B4-B7 = index reg., W0-WF = pointer address	0
		3	Push special register	B0-B1 = special reg.	0
		4	Pull special register	B4-B5 = special reg.	0
		5	Halt	B0-B5 = interrupt mask	0
		6	No-op		0
		7	Software interrupt	B0-B2 = interrupt	0
1F	Extended
		0			0
		1	Return		0
		2	Return far		0
		3	Return from interrupt		0
		4	Transfer from special reg.	B0-B3 = dest. reg., B4-B5 = special reg.	0
		5	Transfer to special reg.	B0-B1 = special reg., B4-B7 = src. reg.	0
		6	Transfer from stack ptr.	B0-B3 = dest. reg.	0
		7	Transfer to stack ptr.	B4-B7 = src. reg.	0